Driver i2c-mlxcpld¶
Author: Michael Shych <michaelsh@mellanox.com>
This is the Mellanox I2C controller logic, implemented in Lattice CPLD device.
- Device supports:
- Master mode. 
- One physical bus. 
- Polling mode. 
 
This controller is equipped within the next Mellanox systems: “msx6710”, “msx6720”, “msb7700”, “msn2700”, “msx1410”, “msn2410”, “msb7800”, “msn2740”, “msn2100”.
- The next transaction types are supported:
- Receive Byte/Block. 
- Send Byte/Block. 
- Read Byte/Block. 
- Write Byte/Block. 
 
Registers:
| CPBLTY | 0x0 | 
 | 
| CTRL | 0x1 | 
 | 
| HALF_CYC | 0x4 | 
 | 
| I2C_HOLD | 0x5 | 
 | 
| CMD | 0x6 - command reg. Bit 0, 0 = write, 1 = read. Bits [7:1] - the 7bit Address of the I2C device. It should be written last as it triggers an I2C transaction. | |
| NUM_DATA | 0x7 | 
 | 
| NUM_ADDR | 0x8 | 
 | 
| STATUS | 0x9 | 
 | 
| DATAx | 0xa | 
 |